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Device Overview MC9S12G-Family
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1.3.5
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1.3.6
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1.3.7
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44
Interrupt ?ag register for pin interrupts on ports P, J and AD
Control register to con?gure IRQ pin operation
Routing register to support programmable signal redirection in 20 TSSOP only
Routing register to support programmable signal redirection in 100 LQFP package only
Package code register preset by factory related to package in use, writable once after reset. Also
includes bit to reprogram routing of API_EXTCLK in all packages.
Control register for free-running clock outputs
Main External Oscillator (XOSCLCP)
Loop control Pierce oscillator using a 4 MHz to 16 MHz crystal
— Current gain control on amplitude output
— Signal with low harmonic distortion
— Low power
— Good noise immunity
— Eliminates need for external current limiting resistor
— Transconductance sized for optimum start-up margin for typical crystals
— Oscillator pins can be shared w/ GPIO functionality
Internal RC Oscillator (IRC)
Trimmable internal reference clock.
— Frequency: 1 MHz
— Trimmed accuracy over –40?C to +125?C ambient temperature range:
± 1.0% for temperature option C and V (see Table A-4 )
± 1.3% for temperature option M (see Table A-4 )
Internal Phase-Locked Loop (IPLL)
Phase-locked-loop clock frequency multiplier
— No external components required
— Reference divider and multiplier allow large variety of clock rates
— Automatic bandwidth control mode for low-jitter operation
— Automatic frequency lock detector
— Con?gurable option to spread spectrum for reduced EMC radiation (frequency modulation)
— Reference clock sources:
– External 4–16 MHz resonator/crystal (XOSCLCP)
– Internal 1 MHz RC oscillator (IRC)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
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